HS6621CG

昂瑞微
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概述

The HS6621Cx family is a single-mode, low-power Bluetooth 5.1 System-on-Chip (SOC). It can be configured as a Broadcaster, an Observer, a Central, and a Peripheral and supports the combination of all the above roles, making it an ideal choice for Internet of Things (IOT) and smart wearable devices.
Based on ARM® Cortex®-M4F CPU core, the HS6621C integrates Bluetooth 5.1 protocol stacks, a 2.4 GHz RF transceiver, programmable Flash memory, RAM, and multiple peripherals.
HS6621Cx series includes HS6621CG, HS6621CQ, and HS6621CM.

特性

RF transceiver
• -95dBm sensitivity @1Mbps
• -93dBm sensitivity @2Mbps
• -96dBm sensitivity @500Kbps
• -100dBm sensitivity @125Kbps
• TX power -20~7dBm
• RSSI (1db resolution)
CPU
• ARM® Cortex™-M4F, max 64MHz
• Serial Wire Debug (SWD)
Memory
• 64KB SRAM
• 48KB ROM
• SFLASH
• HS6621CG: 8Mb
• HS6621CQ: 4Mb
• HS6621CM: 4Mb
Clocks
• HS6621CG: 32MHz crystal, 32MHz RC, 32.768KHz crystal, 32.768KHz RC
• HS6621CQ: 32MHz crystal, 32MHz RC, 32.768KHz RC
• HS6621CM: 32MHz crystal, 32MHz RC, 32.768KHz crystal, 32.768KHz RC
Link Controller
• BT 5.1 LE PHY, link controller
• Proprietary 2.4-GHz link controller
Power Management
• Supply voltage range 1.8V~3.6V
• 5.3mA peak current in RX
• 5.2mA peak current in TX (0dBm)
• 0.4uA in Hibernation mode without RTC clock
• 0.8uA in Hibernation mode with RTC clock
• 2.5uA in deep sleep mode
• Integrated DCDC BUCK Converter
• Integrated Charger
Software
• Full compliant with BLE version 5.1, complete power-optimized stack,
including controller and host
• Supports BT mesh network
• Support BLE sample applications and profiles
• Support HCI controller interface
• Support 6 Low PAN
• Support OTA
Peripherals
• 8 channels DMA
• UART x 2
• I2S interface
• Flexible General Purpose IOs
• HS6621CG: 32 general-purpose I/O GPIOs (max)
• HS6621CM: 17 general-purpose I/O GPIOs (max)
• HS6621CQ: 21 general-purpose I/O GPIOs (max)
• I2C (master or slave) x 3
• SPI (master or slave) x 2
• QSPI LCD/AMOLED controller
• QSPI Flash controller
• Watchdog to prevent system dead lock
• RTC
• Timers(32bit) x 3
• PWM 3 x 4
• Keyboard controller
• Three way QDEC
• Flexible GP-ADC
• HS6621CG/HS6621CQ:8 single-end or differential-end 12bits GP-ADC
• HS6621CM:6 single-end or differential-end 12bits GP-ADC
Audio ADC
• HS6621CG: Audio 16-bit ADC,SNR 93dB
• HS6621CM: Audio 16-bit ADC,SNR 93dB
• Touch sensor controller
• Fully programmable pin assignment
• AES128 HW encryption
• HW Random Number Generator
• Digital signal processing (DSP) instructions
Package
• HS6621CG: 48-pin 6x6mm QFN48
• HS6621CM: 32-pin 4x4mm QFN32
• HS6621CQ: 32-pin 4x4mm QFN32

特性

BLE Mesh, LE 1M PHY

方框图

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应用说明

Products are applied in the fields of smart phones, feature phones, tablets, personal computers, wireless mouses, keyboards and smart home products, etc.

内核

ARM Cortex-M4

CPU时钟频率

64Mhz

CPU构造

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CPU特性

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蓝牙版本

5.1

频率

64MHz

Flash (kB)

8Mb

缓存

-

SRAM (kB)

64

EEPROM (kB)

__

调试

__

升级方式

Manual

晶振

no

PLL时钟

no

可选晶振

no

RC时钟

no

外部时钟

no

时钟 [数量, 位]

no

实时时钟

no

看门狗计数器

no

GPIO

__

针脚

48

针距

__

通道

__

ADC [数量, 位]

__

真随机数发生机器

__

模拟组件

no

低功耗组件

no

温度传感器

no

NFC标签

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SPI

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DAC [数量, 位]

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UART

__

同步串行接口

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PWM [数量, 位]

__

I2C

-

TWI

no

QDEC

-

PDM

-

USB

no

SPI

no

Quad SPI

-

I2S

no

调试界面

-

人机界面

-

可编程通道

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固定通道

__

通道组

__

电压 [最小~最大] (V)

1.8V~3.6V

no

VBUS

no

可调供电输出

-

电源失效

no

加密加速计

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公钥硬件加速器

__

加速器

__

安全

__

__

电流

2.5uA in deep sleep mode

传感器控制器

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待机

__

兼容标准

__

接收器灵敏度

-93dBm sensitivity @2Mbps

输出功率

-20~7dBm

射频规范

__

协议

-

蓝牙5性能

-

蓝牙5.1支持

Yes

尺寸

6x6mm

封装型式

-

DSP RAM

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DSP时钟速度

__

DSP时钟速度

__

音频控制

__

概要

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